Essentials of Mobile Handset Design by Whale Peter

Author:Whale, Peter...
Language: eng
Format: epub
Published: 2014-04-24T08:27:01.627000+00:00

4.5.1.3 Power consumption and emerging multi-core designs

In 2011, smartphones first entered the market powered by multi-core CPU designs – initially dual-core, with the expectation of quad-core devices to follow. From a chipset design perspective, the major motivation to move from a single-core to a multi-core design approach is to improve performance further, without a resultant increase in power consumption. Traditional improvements in chipset performance are achieved fundamentally by migration to smaller process geometries (resulting in a faster time to switch a transistor, as the signal has less distance to travel in the same unit of time) and increasing the clock frequency (resulting in more transistor switches for the same unit of time compared to a lower frequency). Increasing the clock frequency also increases power consumption, as more energy is used in the same period of time, with an increasing amount of that energy being lost in the form of heat dissipation. Sophisticated power management design techniques are used to reduce the clock frequency wherever possible (for example, when a handset is in standby or “idle mode”) in order to reduce power usage.

In addition, techniques such as the use of faster and larger memory caches allow the processor to be more fully utilized, instead of losing clock cycles waiting for data to be loaded from external memory, which can take a number of clock cycles to achieve.

As increasing the frequency also increases power consumption (according to a mathematical power law), beyond a frequency of about 1 GHz new methods are required to achieve further improvements in performance without significantly compromising power consumption.

By introducing a multi-core approach, it becomes possible to run two (or more) functions at the same time for a particular clock speed. So, in theory at least, it should be possible to double the performance of a chipset for the same power consumption by moving from a single- to a dual-core architecture. In practice, there are constraints imposed by the nature of the tasks which can and cannot be run in parallel, and the software overhead to manage the sharing out of tasks, which reduce this theoretical performance improvement. Nonetheless, in a contemporary mobile phone, there are numerous opportunities to introduce parallelism. Simple examples include web browsing whilst decoding high-quality video and audio, whilst updating real-time map data based on new data from a GPS receiver. End-user benefits are clear in terms of faster webpage loading, smoother multimedia playback, faster task switching and an overall more responsive user interface. Reminiscent of the PC industry, but new for the mobile handset industry, chip design facts such as processor speed and the number of cores supported are now being marketed by handset companies to demonstrate that new products are able to deliver improved performance to the end user.

Additional software support is required for multi-core designs – normally in the OS – to allocate tasks to different cores to achieve maximum concurrency. For software developers, there is an added responsibility to create code which is multi-threaded, which means that two or more instances of the same code could be run at the same time.

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